Electronic devices often convert a digital value into an analog value. Digital to Analog Converters (DACS) can perform this function. DACs can be made to be precise and fast, but may require analog circuitry and can be expensive to implement in an integrated circuit (IC).
Another technique that can be used to create an analog voltage from a digital value is called pulse width modulation. A pulse width modulator (PWM) can be implemented digitally in an IC. PWMS can be used as a cheap and simple alternative to a DAC in applications where precision and speed are not critical.
Referring to FIG. 1, a circuit diagram illustrating the components of a conventional 8-bit PWM 10 is shown. The circuit 10 comprises a counter 12, a register 14, a zero detector 16, a comparator 18, and an output driver 20. The PWM 10 works by creating a repeating pulsed output, where the width of the pulse is proportional to the digital input. The circuit 10 generates a pulse signal at the output 22 in response to (i) a clock signal CLK and an 8-bit digital input word DIW. The counter 12 is clocked by a high frequency clock signal CLK. The zero detector 16 triggers the register 14 to latch the digital input word each time the counter output is zero. The counter output is compared to the latched digital input word by the comparator 18.
If the counter output value is less than the digital input word, the pulse signal is HIGH. If the counter output value is greater than or equal to the digital input word, the pulse output is LOW. The circuit 10 generates a HIGH pulse that starts when the counter 12 rolls over to zero and stops when the counter output value equals the digital input word. The pulse output is filtered by a simple resistor/capacitor low-pass filter 30 that smooths the pulse output into a steady analog voltage. The wider the pulse width, the higher the voltage on the filter output.
To get an 8-bit resolution, the counter 12, the register 14, and the comparator 18 must be 8-bit devices. An 8-bit resolution provides 256 discrete pulse widths at a frequency of F.sub.CLK /256. Filtering the pulse signal with the low-pass filter 30 gives 256 discrete output voltage levels.
One disadvantage to this approach is that the speed the output voltage changes is limited by the cutoff frequency of the filter 30. If the cutoff frequency is increased, the speed of the circuit 10 is improved. However, rippling on the output is also increased, potentially causing other problems in the system. One way that rippling on the output has been reduced is to couple two PWMs together. However, this requires two resistors in the filter 30, two output pins, and twice the circuitry.